The Stratix® V FPGA family includes four device variants:
- Stratix V GX FPGAs with transceivers: Integrate up to 66 full-duplex, 14.1-Gbps transceivers and up to 6 x72-bit DIMM DDR3 memory interfaces supporting 1,066 MHz
- Stratix V GS FPGAs with enhanced digital signal processing (DSP) capabilities and transceivers: Integrate up to 3,926 18x18, high-performance, variable-precision multipliers, 48 full-duplex, 14.1-Gbps transceivers , and up to 6 x72-bit DIMM DDR3 memory interfaces supporting 1,066 MHz
- Stratix V GT FPGAs with transceivers: Integrate four 28-Gbps transceivers and 32 full-duplex, 12.5-Gbps transceivers with up to 4 x72-bit DIMM DDR3 memory interfaces supporting 1,066 MHz
- Stratix V E FPGAs: Up to 950K logic elements (LEs), 52-megabit (Mb) RAM, 704 18x18 high-performance, variable-precision multipliers, and 840 I/Os
Tables 1 through 3 provide an overview of the Stratix V GX, GS, GT, and E device family variants. Please note that, at this time, all specifications are subject to change.
Please refer to the Altera Product Catalog to view the Stratix FPGA family package plan with vertical migration support and ordering code information.
Please refer to the Altera Product Catalog to view the Stratix FPGA family package plan with vertical migration support and ordering code information.
Please refer to the Altera Product Catalog to view the Stratix FPGA family package plan with vertical migration support and ordering code information.
Table 4 lists the temperature support for all Stratix V FPGA variants.
