Embedded Systems Laboratory Exercises

Altera provides a number of ready-to-teach laboratory exercises for embedded systems courses, listed in the table below. The introductory exercises make use of the DE-series Media Computer. They illustrate the programmer's view of a computer, including the assembly language, stacks, subroutine linkage, and input/output transfers.

Some of the exercises require the use of the SOPC Builder software to design and implement a Nios II system, instead of using the DE-series Media Computer. There are also an exercises that introduce the student to the processing of sound signals and to the elements of graphics and animation.

As an aid for instructors, a complete solution for each lab exercise is available, including the appropriate Nios II assembly language or C source code. Unformatted text versions of these exercises and the source files for the figures are also available.

• Source code and solutions

The following table shows the available laboratory exercises. The exercises are avalable in both Verilog and VHDL, and for several DE-series boards. Use the filters below to choose the ones that are appropriate for your course.