from Altera
The Altera® Arria® II GX FPGA Development Kit, 6G Edition delivers a complete system-level design environment with the hardware and software needed to immediately begin developing 6G FPGA designs. With this PCI-SIG®-compliant board and a one-year license for Quartus® II design software, you can:
- Develop and test FPGA designs with transceivers supporting up to 6.375-Gbps data rates
- Develop and test memory subsystems consisting of DDR2 and DDR3 memory
- Develop and test designs based on other Arria II GX FPGA-supported protocol interfaces such as PCI Express® (PCIe®) 1.0, Gbps Ethernet (GbE), SDI, CPRI, OBSAI, SAS/SATA, and Serial RapidIO®. Many of these are supported by taking advantage of this board's modular capability through the high-speed mezzanine card (HSMC) connectors and over 20 different HSMC connectors available through Altera partners.
Arria II GX FPGAs also support other protocols.
Ordering Information
| Table 1. Arria II GX FPGA Development Kit, 6G Edition Ordering Code and Pricing Information | ||
| Ordering Code | Price | Ordering Information |
|---|---|---|
| DK-DEV-2AGX260N | Buy online via Altera´s eStore or contact your local Altera distributor to place your order. | |
Other HSMC-compatible daughtercards, adapters, or cables are also available.
HSMC Interface
Altera developed the specification for the HSMC, which is based on the Samtec mechanical connector, to define and standardize the interface between optional daughtercards and host boards. This specification outlines both the electrical and mechanical properties of the interface between daughtercard and host. You can also create your own HSMC interface-compatible daughtercards.
Development Kit Contents
The Arria II GX FPGA Development Kit, 6G Edition is RoHS-compliant and features the following:
- Arria II GX EP2AGX260 FPGA in the 1,152-pin fine-pitch ball-grid array (BGA) package
- 256,000 logic elements (LEs)
- 102,600 adaptive logic modules (ALMs)
- 11,756 Kb on-chip memory
- 16 high-speed transceivers
- 6 phase-locked loops (PLLs)
- 736 18x18 multipliers
- 0.9-V core power
- Max® II EPM2210F256 CPLD in the 256-pin fine-pitch BGA package
- 2.5-V core power
- Onboard ports
- Two HSMC expansion ports
- One GbE port
- Onboard memory
- 128-MB 16-bit DDR3 device
- 1-GB 64-bit DDR2 SODIMM
- 2-MB SSRAM
- 64-MB flash
- FPGA configuration circuitry
- MAX II CPLD and flash fast passive parallel configuration
- Onboard USB-Blaster™ circuitry using the Quartus II Programmer
- Onboard clocking circuitry
- Four onboard oscillators
- 100 MHz
- Programmable oscillator, default frequency 125 MHz
- Programmable oscillator, default frequency 100 MHz
- 155.52 MHz
- SMA connectors for external LVPECL clock input
- SMA connector for clock output
- Four onboard oscillators
- General user I/Os
- LEDs/displays
- Four user LEDs
- Two-line character LCD display
- One configuration-done LED
- One HSMC interface transmit/receive LED
- Three PCIe LEDs
- Five Ethernet LEDs
- LEDs/displays
- Push buttons
- One user reset (CPU reset)
- One MAX II CPLD reset
- One load image (program FPGA from flash)
- One image select (select image to load from flash)
- Two general user push buttons
- Dual in-line package (DIP) switches
- Four user DIP switches
- Eight MAX II device control DIP switches
- Power supply
- 14-V to 20-V DC input
- PCIe edge connector power
- Onboard power measurement circuitry
- Mechanical
- PCIe full-length standard-height (8.48” x 4.376”)
- PCIe chassis or bench-top operation
- Arria II GX FPGA Development Kit CD-ROM
- Design examples
- Board Update Portal, featuring the Nios® II processor web server and remote system update
- Board Test System
- Complete documentation (see Table 2)
- Design examples
- Altera's complete Design Suite (download from Altera Download Center)
- Quartus II software Development Kit Edition, includes support for Arria II GX FPGAs
- Includes one-year license
- Nios® II Embedded Design Suite
- MegaCore® IP Library includes PCIe, Triple Speed Ethernet, SDI, and DDR3 High-Performance Controller IP cores
- IP evaluation available through OpenCore Plus
- Quartus II software Development Kit Edition, includes support for Arria II GX FPGAs
- Power adaptor and cables
Figure 1. Arria II GX FPGA Development Board, 6G Edition

Available Documentation
| Table 2. Documents Available for the Arria II GX FPGA Development Kit, 6G Edition | ||||
| Document | Description | Format | Language | Version |
|---|---|---|---|---|
| User guide | Information about setting up the Arria II GX FPGA development board, 6G edition, and using the included software |
English | 1.0 | |
| Reference manual | Detailed information about board components and interfaces | English | 1.0 | |
Kit installation (via FTP)
|
(Updated) Full installation of all files including reference manual, user guide, quick-start guide, demos and tutorials, BOM, layout, PCB, schematics, Board Update Portal example file, Board Test System example file, and others |
PDF and |
English |
11.1.0 (1) |
| Kit installation (via FTP) |
(Archive) Full installation of all files including reference manual, user guide, quick-start guide, demos and tutorials, BOM, layout, PCB, schematics, Board Update Portal example file, Board Test System example file, and others Conversion of Board Update Portal from SOPC-based to Qsys-based design |
PDF and |
English | 11.0.0 (2) |
| Kit installation (via FTP) |
(Archive) Full installation of all files including reference manual, user guide, quick-start guide, demos and tutorials, BOM, layout, PCB, schematics, Board Update Portal example file, Board Test System example file, and others | PDF and |
English |
10.0.0 (3) |
Notes:
- This kit installation works with Quartus II designsoftware version 11.1.0.
- This kit installation works with Quartus II designsoftware version 11.0.0.
- This kit installation works with Quartus II designsoftware version 10.0.0.
