Altera's complete memory interface design solutions address today's high-speed memory interface challenges such as memory controller, I/O design, and board-level signal integrity issues. Altera's solutions include advanced device architectures, customizable MegaCore® functions, Quartus® II design software, reference designs, demonstration boards, and simulation models, accompanied by a rich set of technical documentation.
Table 1 lists external memory interfaces supported by Altera FPGAs and HardCopy® ASICs.
Get more information using our External Memory Interface Spec Estimator.
| Table 1. External Memory Interface Support | |||||||
| Device | Memory Type | ||||||
|---|---|---|---|---|---|---|---|
| DDR3 SDRAM | DDR2 SDRAM | DDR SDRAM | RLDRAMII | RLDRAMIII | QDRII SRAM | QDRII+ SRAM | |
| Stratix V (1) | - | ||||||
| Stratix IV | - | ||||||
| Stratix III | - | ||||||
| Stratix II and Stratix II GX | - | - | |||||
| Stratix and Stratix GX | - | - | - | - | |||
| Arria V (1) | - | - | |||||
| Arria II GZ | - | - | |||||
| Arria II GX | - | - | |||||
| Arria GX | - | - | - | - | - | ||
| Cyclone V (1) | - | - | |||||
| Cyclone IV | - | - | - | - | |||
| Cyclone III LS | - | - | - | - | |||
| Cyclone III | - | - | - | - | |||
| Cyclone II | - | - | - | - | |||
| HardCopy IV | - | ||||||
| HardCopy III | - | ||||||
| HardCopy II | - | - | |||||
Notes
Related Links
- View the External Memory Interfaces Handbook
- View the demo video and learn how to interface 1,067-Mbps DDR3 DIMM memory to Stratix IV FPGAs
- Sign up for instructor-led training on interfacing to external memories with Altera® FPGAs
- Debug GUI Users Guide (PDF)
- Debug GUI (ZIP)
